Automatic gain control circuit

ABSTRACT

A gated sample and hold IF/RF integrated AGC circuit for a television receiver employs a combination of the synchronizing pulse and a flyback pulse for gating a peak detected video signal during the sync pulse interval to obtain the AGC voltage. A differential amplifier provides RF delay for the RF AGC, with negative feedback from the differential amplifier to the input of the IF AGC amplifier being employed to hold the IF AGC amplifier output constant during a transition period when the RF gain control is varied. Before and after this transition, the IF gain control follows the AGC voltage provided by the gated AGC input circuit.

United States Patent 11 1 Wilcox [4 June 19, 1973 AUTOMATIC GAIN CONTROLCIRCUIT [75] Inventor: Milton E. Wilcox, Mesa, Ariz. [73] Assignee:Motorola, Inc., Franklin Park, Ill.

[22] I Filed: Feb. 24, 1972 21 App]. No.: 229,230

Related UQS. Application Data [62] Division of Ser. No. 71,125, Sept.10, 1970, Pat. No.

3,697,883 10/1972 Wilcox 330/29 Primary Examiner-Richard MurrayAssistant ExaminerFay Konzem Att0rneyMueller & Aichele' [57] ABSTRACT Agated sample and hold IF/RF integrated AGC circuit for a televisionreceiver employs a combination of the synchronizing pulse and a flybackpulse for gating a peak detected video signal during the sync pulseinterval to obtain the AGC voltage. A differential amplifier provides RFdelay for the RF AGC, with negative feedback from the differentialamplifier to the input of the IF AGC amplifier being employed to holdthe IF AGC amplifier output constant during a transition period when theRF gain control is varied. Before and after this transition, the IF gaincontrol follows the AGC voltage provided by the gated AGC input circuit.

7 Claims, 3 Drawing Figures PATENTEB 9 sam'aorz AUTOMATIC GAIN CONTROLCIRCUIT This is a division, of application Ser. No. 71,125 now U.S. Pat.3,697,883, filed Sept. 10, 1970.

BACKGROUND OF THE INVENTION If the amplitude of the composite videosignal developed in a television receiver is allowed to varysignificantly, a strong incoming signal may cause the video amplifiersto become overloaded, resulting in crossmodulation and clipping of thesynchronizing components, while a weak incoming signal may cause theoutput of the video amplifiers to be too low to provide proper picturereproduction. In addition, unwanted variations of contrast may resultfrom a video signal which is changing in amplitude. To maintain thevideo signal relatively constant with variations in the level of theincoming television signal, an automatic gain control (AGC) circuit iscommonly employed to maintain the signal level applied .to the videodetector at a substantially constant level. The AGC function isaccomplished by developing a control signal which is proportional tothestrength of the incoming signal and is applied to the radio frequency(RF) and intermediate frequency (IF) amplifier stages in a manner whichdecreases the respective gains of these stages as the strength of theincoming signal increases.

It has been learned that when the gain of the RF stage is reduced, thesignal-to-noise ratio of the receiver degrades to undesirably increasethe noise composition of the video signal. Therefore, the gain of the RFstage should be maintained at a maximum, while the gain of the IF stageis decreased for a range of the weakest signals to be received. When theincoming signal is strong enough to appreciably override the noise, thegain of the RF stage should be reduced in order to prevent overload ofsucceeding stages, such as the converter. Since the converter hasnon-linear transfer characteristics excessively high level signalsapplied to it will introduce intermodulation products into the videosignals.

Therefore, it is desirable to maintain the RF gain constant; so that thelevel of the converter input signal continues to increase for weakincoming signals of increasing strength until the level of such inputsignals is a predetermined amount less than that which causes converteroverload. For further increases in the incoming signal strength, the IFgain should be maintained constant and the RF gain should be reduced ata rate to provide a converter input signal having a constant amplitudesomewhat less than the converter overload level. When maximum gainreduction of the RF stage has been effected, further gain reduction thenshould be resumed in the IF stage.

It further is desirable in present television receivers to provide asmuch of the receiver'circuitry as possible in an integrated circuitform, in order to obtain the advantages inherent in the utilization ofintegrated circuits. To obtain the most effective use of an integratedcircuit providing a gain control system for supplying IF and delayed RFgain control signals to the remainder of a television receiver, it isdesirable to provide an integrated gain control circuit which may beutilized in a large number of receivers having a different circuitconfigurations in the IF and RF stages. A universal gain control circuitpermits realization of the inherent cost advantages presentin the largevolume production of identical circuits.

SUMMARY OF THE INVENTION It is, therefore, an object of this inventionto provide an improved automatic voltage control circuit.

An additional object of this invention is to provide a gain controlcircuit having at least two outputs, one of which varies for inputsignals in a first region and which is held constant for input signalsin a second region, in which the second output varies.

It is a further object of this invention to provide a gain controlcircuit providing a delayed gain control voltage at a first of twooutputs, the second of which is varied initially in response to changesin the level of an input signal in a first region, with the secondoutput being held constant by means of a negative feedback from thefirst output when the input signal reaches a second predeterminedregion.

In accordance with a preferred embodiment of this invention, an inputcircuit provides an input voltage which is to be utilized by first andsecond amplifiers, with the first amplifier providing an output which isindicative of the level of the input voltage in a first region. Thesecond amplifier provides a first substantially constant output with theinput voltage in the first region and provides a second outputindicative of the level of the input voltage in a second region, with afeedback circuit coupled to the output of the second amplifier forsupplying a control signal to the input of the first amplifier. Thecontrol signal is substantially stable with the input signal voltage inthe first region and varies in an amount to offset the input voltagevariations in the second region to cause the output of the firstamplifier to be substantially constant for input voltages in the secondregion.

In a more specific embodiment of the invention the input voltage isgenerated in a sample and hold gated AGC circuit responsive to thesyncrhonizing and flyback pulses in a television receiver for samplingthe signal level during coincidence of the syncrhonizing and flybackpulses to provide the input voltage supplied to the first and secondamplifier circuits described above.

BRIEF DESCRIPTION OF THE DRAWING FIG. 1 is a block diagram of atelevision receiver in which a gated AGC circuit may be employed;

FIG. 2 is a detailed circuit diagram of a preferred embodiment of theinvention which may be used in the television receiver shown in FIG. I;and

FIG. 3 shows waveforms useful in describing the operation of the circuitshown in FIG. 2.

DETAILED DESCRIPTION Referring now to the drawing, there is shown inFIG. 1 a typical color television receiver in which an incoming signalis received by an antenna 10 and is applied to a radio frequencyamplifier and converter stage 14, which amplifies and reduces thefrequency of the received signals to provide intermediate frequency (IF)signals. These IF signals then are amplified in a series of video IFamplifiers, indicated in the drawing as first and second video IFamplifiers 16 and 22. The output of the second IF amplifier 22 isdetected in a video detector stage 24 to provide a composite videosignal, with the brightness components and synchronizing components inthe video signal being amplified in a first video amplifier circuit 26and also being applied to the input of a color processing system 36responsive to the color signal components of the detected video signal.

The amplified brightness and synchronizing signal components from theoutput of the first video amplifier stage 26 are delyed in a delaycircuit 28, for purposes well-known to those skilled in the art, areamplified in a second video amplifier 30 and are applied to one input ofa direct demodulator circuit 34. The composite chroma signal components,after being processed in the color system 36, are applied to anotherinput of the demodulator 34, which produces the red, blue, and greenvideo voltages directly on three outputs coupled with the threedifferent cathodes of a color chathode ray tube 38.

In addition to providing the brightness signal components to one of theinputs of the demodulator circuit 34, the second video amplifier stage30 also supplies the composite video signal to a delay circuit 39 and anoise inverter 40. One output of the delay circuit 39 and the output ofthe noise inverter circuit 40 are combined at a junction 41, so thatnoise impulses in excess of the signal synchronizing components of thecomposite signal are removed at the terminal 41. As a result, noise-freevideo signals are applied from the terminal 41 to a synchronizing signalseparator circuit 42, which supplies the horizontal and verticalsynchronizing signal components to horizontal and vertical sweepsystems. 43 and 44, respectively. The sweep systems 43 and 44 developthe horizontal and vertical sweep signals in a horizontal deflectionwinding 46 and a vertical deflection winding 48, each of which isdisposed on the neck of the cathode ray tube 38.

Another output of the delay circuit 39 also is applied to a gatedautomatic gain control circuit 50, which is gated by the horizontalretrace pulses obtained from the horizontal sweep system 43 and thesynchronizing pulses obtained from the synchronizing signal separatorcircuit 42 to develop a gain control signal during the gated intervals.This gain control signal appears on a conductor 52 and changes inamplitude according to the amplitude of the peak synchronizing pulsecomponents present during the gating interval. The strength or magnitudeof the synchronizing-pulse components, is, in turn, dependent upon thestrength of incoming signals appearing at the antenna so that thevoltage appearing on the lead 52 is representative of the input signalstrength.

Depending on the nature of the circuit with which the gain controlcircuit 50 is used, the gain control voltage on the lead 52 may beeither a forward or reverse (positive or negative) gain control voltageand is applied to thefirst video IF stage 16 and is delayed by asuitable delay circuit 54 and applied to the RF amplifier and converterstage 14. Thus, the gain control voltage operates initially to controlthe gain of the video IF stage 16 and, for increased signal levels,operates to control the gain of the RF and converter stage 14 in amanner which is well-known. The interconnections of the gated AGCcircuit 50 with the delay circuit 54 and the first video amplifier l6and RF amplifier and converter stage 14 are indicated functionally inFIG. 1, and the circuit connections shown do not necessarily reflectactual circuit connections employed in the implementation of thefunctions indicated in block form in FIG. 1.

Referring now to FIG. 2, there is shown in detail the gated AGC anddelay circuits which are illustrated in block form in FIG. 1 as thecircuits 50 and 54. The components enclosed in dotted lines in FIG. 2all may be formed on an integrated circuit chip, which may be a separatechip as illustrated in FIG. 2 or may be part of a larger integratedcircuit including additional circuit functions of the televisionreceiver shown in block form in FIG. 1.

Positive DC operating potential for the circuit shown in FIG. 2 isapplied to an input terminal or bonding pad across a voltage dividerincluding a plurality of resistors 61 and an NPN transistor diode 62connected between the terminal 60 and ground. The biasing potentials forvarious parts of this circuit then are obtained from the voltage divider61, 62 at selected points coupled to the bases of a pair of referencevoltage transistors 64 and 66, the emitters of which supply differentlevels of bias or operating potential to different parts of the circuit.

The noise-free vide signals at the junction 41 (FIG. 1) are applied to abonding pad 68 through a capacitor 63. Also connected to the bonding pad68 is a resistor 65, the other end of which connects to the source ofpositive DC operating potential. The action of the capacitor 63 alongwith the resistor serves to clamp the peak portions of the synchronizingsignal comp0- nents at the base of the NPN input transistor 69, causingsynchronizing signal separation in the conventional manner. Thesynchronizing signals present on the collector of the transistor 69 areamplified by lateral PNP transistor 70, the collector of which suppliesthe signals to the synchronizing signal inverter NPN transistor 72through a coupling resistor 71. Output signals from the synchronizingsignal separator portion of the circuit are obtained from the junctionof the emitters of an NPN transistor 73 and a substrate PNP transistor74, the collector-emitter paths of which are connected in 60 between thebonding pad 73 and ground. This junction of the emitter of thetransistors 73' and 74 provides the separated synchronizing pulses on anoutput bonding pad 80, with these pulses then being applied to thevertical and horizontal sweep systems 44 and 43, shown in FIG. 1. Theinputs to the transistors 73 and 74 are applied in common to the basesthereof, with the synchronizing signal separator circuit being ofconventional configuration.

To provide the gated AGC function for operating the automatic gaincontrol circuitry, a differential amplifier comparator circuit 81 isprovided, consisting of a pair of NPN transistors 82 and 83, with thecollector of the transistor 82 being connected directly to the B+ supplybonding pad 60 and the collector of the transistor 83 being connected tothe bonding pad 60 through a collector load resistor 84. The emitters ofthe transistors 82 and 83 are connected to an NPN current sourcetransistor 86 the emitter of which is connected through a transistor 87to ground.

Bias potential for the current source transistor 86 is obtained from avoltage supply in the form of a voltage divider coupled with the emitterof the transistor 64 and including a resistor 88, a transistor diode 89,and an additional resistor 90, coupled between the emitter of thereference voltage transistor 64 to ground. In the absence ofsynchronizing signal pulse portions of the signal on the input terminal68, the transistor 69 is rendered non-conductive, causing the transistoralso to be non-conductive, causing a control transistor 92, the base ofwhich is coupled through a coupling resistor 93 to the collector of thetransistor 70, also to be nonconductive. As a consequence, the potentialon the collector of the transistor 92 is high, substantially at thelevel of the potential on the emitter of the transistor 64, whichforward biases into heavy conduction an NPN shunt transistor 95 to shuntthe junction between the resistor 88 and the diode 89 to ground. Thisclamping or shunting of the power supply for the base of the currentsource transistor 86 to ground causes the transistor 86 to benon-conductive. In addition, the junction between the resistor 88 andthe diode 89 is shunted to ground through a normally conductivetransistor 96, the base of which is connected to a bonding pad 97 towhich is applied a signal from the horizontal sweep system 43 includingthe flyback pulse. During the trace intervals of the signal, the levelof signal applied to the bonding pad 97 is relatively positive, forwardbiasing the transistor 96 into conduction and further shunting the powersupply and preventing the current source transistor 86 from conducting.Thus, so long as either of the transistors 95 or 96 is conductive, thecurrent source transistor 86 is non-conductive and the comparatorcircuit-81 is off or inoperative.

The delayed composite input signals from the second output of thedelayed circuit 39 (FIG. 1) are applied to an AGC signal input bondingpad 98 connected to the base of the transistor 82. A reference voltagefor establishing the operating point of the comparator circuit 81 isobtained from the emitter of the reference transistor 66 which isconnected directly to the base of the transistor 83, which is thereference transistor for the comparator circuit 81.

When a synchronizing pulse is applied to the bonding pad 68, thetransistors 69and 70 are rendered conductive, which in turn causes thetransistor 92 to be rendered conductive, causing the potential appliedto the base of the transistor 95 to be insufficient to forward bias thetransistor 95. Thus, the transistor 95 becomes non-conductive and opensthe shunt path formerly provided through the transistor 95. During thetime that the synchronizing pulses are present on the bonding pad 68 aflyback pulse is applied to the bonding pad 97. This flyback pulse is anegative-going pulse, as indicated in FIG. 1, and causes the transistor96 to be rendered non-conductive.

Coincidence of the synchronizing signal pulse and the flyback pulse,simultaneously rendering the transistors 95 and 96 nonconductive,provides a forward biasing voltage for the current source transistor 86which conducts, causing the comparator circuit 81 to operate in aconventional manner. At the same time that the current source transistor86 is enabled, a second NPN current source transistor 100, alsoconnected to the junction of the resistor 88 and the transistor diode89, is rendered conductive.

The collector of the current source transistor 100 is connected to anexternal AGC filter or storage capacitor 101, which is utilized tosupply the AGC control I voltage obtained during the synchronizingsignal portion of the composite television signal. The junction of thecollector of the transistor 100 and the capacitor 101 further isconnected to a second current source formed from a lateral PNPtransistor 103 driving an NPN transistor 104 to form a PNP currentsource, with the emitter of the transistor 104 supplying current to thecapacitor 101 and the emitter of the transistor 103 and the collector ofthe transistor 104 being connected to the B-lbonding pad 60. The base ofthe transistor 103 is connected to the collector of the transistor 83 inthe comparator circuit and is rendered more or less conductive inaccordance with the signal level applied to the base of the transistor82 of the comparator circuit 81, when the comparator circuit 81 isrendered operative by conduction of the current source transistor 86, aspreviously described.

The operation of the two current sources and 103-104 is such that thecurrent source 103104 supplies a charge to the capacitor 101 to build upthe charge thereon, and the current source transistor 100 operates toremove charge from the capacitor 101. The comparator circuit 81, alongwith the two current sources coupled to the capacitor 101, operates as asample and hold circuit, with the capacitor 101 storing the charge whichit attains during the conductive intervals of operation of thecomparator circuit 81 and the current source 100. When the samplinginterval, as determined by coincidence of the synchronizing and flybackpulses, has terminated, the current sources 86 and 100 both aredisabled; so that the current source 103104 also is disabled to open thecharging and discharging paths for the capacitor 101. During the nextsampling interval, the capacitor 101 is either charged to a higher levelor discharged in accordance with the relative currents of the currentsources 100 and 103-104, as determined by the operation of thecomparator circuit 81 in response to the level of the input signalsapplied to the input bonding pad 98.

The voltage present on the capacitor 101 is applied through a cascadedpair of NPN emitter-follower transistors 107 and 108, supplied withoperating current from an NPN current source transistor 110, the base ofwhich is coupled to the junction of a pair of resistors in a voltagedivider 111, 112 connected between emitter of the reference transistor66 and ground. The junction of the emitter of the emitter-followertransistor 108 and the collector of the current source transistor 110 iscoupled through a low value couplingresistor 114 to the base of an IFAGC output NPN emitter-follower transistor 116, which provides the IFgain control volt age to the first video IF amplifier 16, shown in FIG.1, at an output bonding pad 119 connected to the junction ofa pair ofresistors 121 and 124 coupled between a source of positive operatingpotential and gound. Thus, as the AGC voltage present on the capacitor101 increases, this increase is reflected through the transistors 107,108 and 116 as an increase in the IF gain control voltage at theterminal 119. The value of the resistor 114 is selected to be low enoughthat the voltage of the IF gain control signal dropped across theresistor 114 is insignificant.

As stated previously, it is desirable to provide the gain reductionfunction for the IF amplifier stages initially, while holding the gainof the RF amplifier and converter stage 14 constant until apredetermined level of gain control signal is reached. In other wordsthe gain control or gain reduction of the RF stage 14 should be delayeduntil a predetermined point below overloading of the converter isreached by the operation of the circuit.

In order to provide this delay, a comparison differential amplifier 125is provided, including a pair of NPN transistors 126 and 127, with thecollectors of both of the transistors 126 and 127 being connectedthrough collector load resistors to the bonding pad 60. The emitters ofthe transistors 126 and 127 are supplied with operating current from acurrent source transistor 128, the base of which is connected to thecollector of the transistor diode 62. The operation of the differentialamplifier 125 as a comparator is conventional, with the AGC voltagepresent on the emitter of the emitterfollower transistor 107 beingconnected to the base of the transistor 126 as the input voltage for thecomparator 125. The reference votage for determining the amount of RFdelay, or the voltage at which RF gain control takes place, is appliedto the base of the transistor 127 from the tap of a potentiometer 133coupled between the source of positive operating potential and ground.Thus, the reference level establishing the delay may be varied inaccordance with the setting on the top of the potentiometer 133 in orderto adjust the circuit for operation in different television receiverswith different requirement.

The circuit is adjusted so that initially the transistor 12 is in astate of full conduction, with the transistor 126 being renderednon-conductive. The collector of the transistor 127 is connected to thebase of a lateral PNP transistor 129, driving the transistor 129 intofull conduction. This lateral PNP transistor 129 is operated as feedbacktransistor and the emitter is connected through a load resistor to thebonding pad 60, with the collector being connected to the junctionbf theresistor 114 and the base of the emitter-follower transistor 116.

During the initial interval of time when the control of the gain, asdetermined by the charge on the capacitor 101, is insufficient to changethe state of the comparator 125, as increasing gain control voltage onthe capacitor 101 causes the gain control for the circuit to be effectedsolely by the output of the emitter-follower transistor 1 16 to thefirst video IF amplifier 16. The circuit parameters are selected so thatfull conduction of the transistor 129 into resistor 114 causes the baseof the transistor 116 to be V volts higher than the voltage on theemitter of the transistor 108, where V,, is the minimum voltage range atthe base of transistor 126 required to change the comparator 125 fromits first state to its second state. The base of the transistor 116 isfree to move with the AGC voltage present on the emitter of thetransistor 108, since the conductivity of the transistor 129 is constantduring this initial interval of the gain control voltage. Thus, theslope of the gain control for an increasing incoming signal strengthatthe IF output bonding pad 119 is indicated in FIG. 3 by the portion 130of the IF AGC voltage curve.

When a point is reached where the input AGC voltage applied to the baseof the transistor 126 from the emitter of the transistor 107 is such asto begin to cause the transistor 126 to conduct and to begin to causethe conductivity of the transistor 127 to be reduced, the conductivityof the transistor 129 becomes less. As described above, the circuitparameters have been selected so that the feedback provided by thecollector of the transistor 129 is just theproper amount of negativefeedback to the base of the transistor 116 to off-set the increases ofvoltage present due to the conduction of the transistor 108. This pointis indicated in FIG. 3 as the incoming signal strength A and results ina holding of the IF output constant at a predetermined level as shown bythe portion 131 of the IF voltage curve. At the same time, the RF gaincontrol voltage commences changing, as indicated by the portion 134 ofthe RF AGC voltage curve shown in FIG. 3.

When the incoming signal strength reaches the point that the transistor126 is fully conductive and the transistor 127 is renderednon-conductive (this point being indicated as point B in FIG. 3), thetransistor 129 is rendered non-conductive. Thus, the base of thetransistor 116 once again is permitted to track with the input AGCvoltage on the emitter of the transistor 108, per mitting a continuationof the IF gain control as indicated by the portion of the IF AGC voltagecurve shown in FIG. 3.

At point B the entire RF gain control or gain reduction effected by thecomparator circuit 125 has terminated, so that the RF AGC voltage isconstant, as indicated by the portion 137 on the RF AGC voltage curve ofFIG. 3. The collector of the transistor 126 is connected to a lateralPNP transistor 140, causing the transistor 140 to be non-conductive whenthe transistor 126 is non-conductive. The collector of the transistor140 is coupled through an NPN emitter-follower 142 to an output bondingpad 145 to provide the forward RF AGC voltage indicated in FIG. 3. Asthe conductivity of the transistor 126 increases, the conductivity ofthe transistors 140 and 142 also increases to provide an increasingvoltage at the bonding pad 145.

A reverse RF AGC voltage (shown in dotted lines in FIG. 3) also can beobtained from the comparator 125 and is provided by coupling the base ofa lateral PNP transistor to the collector of the transistor 127 in thecomparator 125. The collector of the transistor 150 then is connectedthrough an NPN emitter-follower transistor 152 to a reverse AGC outputbonding pad 153.

Either the bonding pad 145 or the bonding pad 153 may be connected toprovide the RF AGC voltage to the RF amplifier and converter stage 14shown in FIG. 1, depending on the characteristics of the circuitry usedin these stages. It also may be that for some applications both of theRF AGC voltages present on the bonding pads 145 and 153 may be utilized,but in different RF stages of the circuit. By providing both forward andreverse RF AGC voltages, however, maxi mum flexibility in theutilization of the circuit is possible. In addition, by providing thecollector of the transistor 150 at the bonding pad 154, a negative DCsupply may be affixed for RF amplifiers and converters which require anegative RF AGC voltage.

The conduction points of the lateral PNP transistors 129, 140 and 150normally would lag the conduction points of the NPN transistors 126 and127 in the comparator circuit, so that the break points A and B of theRF AGC voltage output curves and the IF AGC voltage output curves wouldnot coincide as indicated in FIG. 3. It is desirable, however, that suchcoincidence does occur in the operation of the circuit; and to providethis coincidence a cross-coupling resistor is connected between thecollectors of the transistors 126 and 127. The magnitude of thisresistor is selected to cause the transistors 129, 140 and 150 to bebiased just below their turn-on or forward conduction point. Thus, whenthe transistors 129, 140 and 150 undergo a change in conduction due tothe changes in the conductivity of the transistors 126 and 127, thechanges of conductivity of the transistors 129, 140 and 150 follow thechanges of conductivity of the transistors 126 and 127, providing thealignment of the break points in the IF and RF AGC control curves asindicated in FIG. 3.

It should be noted that if the input to the bonding pad 97 wereopen-circuited, the transistor 96 would be rendered non-conductive,permitting the AGC gating of the comparator 81 to be effected solely bythe synchronizing pulses.

I claim: 1. In a television receiver responsive to a compositetelevision signal, including information signal compo nents andsynchronizing signal components, and producing flyback pulses coincidentwith the synchronizing signal components, a system for providing outputvoltages indicative of the signal level of the composite televisionsignal including in combination: I

first amplifier means providing an output indicative of a level of inputvoltages in a first region;

second amplifier means providing a first substantially stable outputwith input voltages in said first region and providing a second outputindicative of the level of input voltages in a second region;

input circuit means for applying input voltages to the inputs of thefirst and second amplifier means;

feedback circuit means coupled with the output of,

the second amplifier means for supplying a control signal to the inputof the first amplifier means, with the control signal beingsubstantially constant for input voltages in said first region, and forinput voltages in said second region being variable in an amount tooffset variations of input voltages in said second region to cause theoutput of the first amplifier means to be substantially constant;

a storage capacitor connected between a point of reference potential andthe input circuit means;

a source of operating potential;

normally inoperative control means for controlling the charging anddischarging of the storage capacitor;

said control means being rendered operative in response to theapplication of a supply voltage thereto;' supply voltage means coupledwith the source of operating potential for providing a supply voltage tothe control means;

gate circuit means coupled to the supply voltage means and operative toshunt the supply voltage to a point of reference potential, renderingthe control means inoperative;

means responsive to at least said synchronizing pulses for rendering thegate circuit means inoperative, causing said supply voltage to beprovided to the control means for the duration of the synchronizingpulses; and

means for applying said composite television input signals to thecontrol means which is responsive theretoto vary the charge on thecapacitor in accordance therewith.

2. The combination according to claim 11 wherein the control meansincludes comparator circuit means having an output coupled with thecapacitor and having a signal input and a reference input; with meansfor providing a reference potential to the reference input of thecomparator circuit means, and said composite television input signalsare supplied to the signal input of the comparator circuit means, withthe supply voltage means supplying operating voltage to the comparatorcircuit means, the comparator circuit means being inoperative with thesupply voltage shunted to said point of reference potential and beingrendered operative with the gate circuit means rendered inoperative.

3. A sample and hold circuit for'use in a television receiver responsiveto composite input signals and providing synchronizing and flybackpulses, the circuit producing an output voltage indicative of the signallevel of an input signal during a sampling interval, the output voltagebeing changeable in accordance with variations in the signal levelduring successive sampling intervals, including in combination:

a storage capacitor connected between a point of reference potential andan input junction;

a source of operating potential;

normally inoperative charge control means coupled between the source ofoperating potential and the storage capacitor for controlling the chargethereon in accordance with the signal level of input signals appliedthereto;

means for supplying said composite television signals to the input ofthe charge control means;

supply voltage means coupled with the source of op erating potential forsupplying an operating voltage to the charge control means;

gate circuit means coupled with the supply voltage means and normallyoperative to shunt the operating voltage to a point of referencepotential,

thereby rendering the charge control means inoperative; and

means responsive to at least said synchronizing pulses to render thegate circuit means inoperative, thereby causing the supply voltage meansto supply said operating voltage to the charge control means renderingthe control means operative to control the charge on the capacitor inaccordance with the signal level of the input signals supplied to thecontrol means.

4. The combination according to claim 3 wherein the gate circuit meansincludes first and second normally conductive shunt means to shunt theoperating voltage to said point of reference potential, the first shuntmeans being rendered nonconductive by said synchronizing pulses and thesecond shunt means being rendered nonconductive by said flyback pulses.

5. A sample and hold circuit for use in a television receiver responsiveto composite television input signals and providing synchronizing andflyback pulses, the circuit producing an output voltage indicative ofthe signal level of an input signal during a sampling interval, theoutput voltage being changeable in accordance with variations in thesignal level during successive sampling intervals including incombination:

a storage capacitor connected between a point of reference potential andan input junction;

a source of operation potential;

first and second current source means connected in series between thesource of operating potential and said point of reference potential,with the first and second current sources being connected together atthe input junction of the capacitor, the first current source meansoperating to supply charge to the capacitor and the second currentsource means operative to remove charge from the capacitor;

comparator circuit means having an output, a signal input and areference input, the comparator output being connected to the firstcurrent source means for controlling the operation thereof;

means for supplying a reference potential to the reference input of thecomparator circuit means for establishing a threshold level;

supply voltage means coupled with the source of operating potential forsupplying an operating voltage to the comparator circuit means and thesecond current source means;

gate circuit means coupled with the supply voltage means responsive toat least said synchronizing pulses to render thegate circuit meansinoperative causing operating voltage to be provided to the comparatorcircuit means and the second current source means for the duration ofthe synchronizing pulses;

and

means for applying said composite television input signals to the signalinput of the comparator circuit means for comparison with the referencepotentialapplied thereto.

6. The combination according to claim 5 wherein the gate circuit meansincludes first and second normally conductive shunt means to shunt thesupply voltage means to said point of reference potential, the firstshunt means being rendered nonconductive by said synchronizing pulsesand the second shunt means being rendered nonconductive by said flybackpulses for rendering the voltage supply means operative upon coincidenceof the flyback pulses and the synchronizing pulses to remove the firstand second shunts from the voltage supply means to thereby render thecomparator circuitmeans and the second current source means operative.

7. The combination according to claim 6 wherein the comparator circuitmeans provides an output to control the conductivity of the firstcurrent source means relative to the conductivity of the second currentsource means thereby varying the charge on the capacitor in accordancewith the relative conductivities of the first and second current SOUICCmeans.

1. In a television receiver responsive to a composite television signal,including information signal components and synchronizing signalcomponents, and producing flyback pulses coincident with thesynchronizing signal components, a system for providing output voltagesindicative of the signal level of the composite television signalincluding in combination: first amplifier means providing an outputindicative of a level of input voltages in a first region; secondamplifier means providing a first substantially stable output with inputvoltages in said first region and providing a second output indicativeof the level of input voltages in a second region; input circuit meansfor applying input voltages to the inputs of the first and secondamplifier means; feedback circuit means coupled with the output of thesecond amplifier means for supplying a control signal to the input ofthe first amplifier means, with the control signal being substantiallyconstant for input voltages in said first region, and for input voltagesin said second region being variable in an amount to offset variationsof input voltages in said second region to cause the output of the firstamplifier means to be substantially constant; a storage capacitorconnected between a point of reference potential and the input circuitmeans; a source of operating potential; normally inoperative controlmeans for controlling the charging and discharging of the storagecapacitor; said control means being rendered operative in response tothe application of a supply voltage thereto; supply voltage meanscoupled with the source of operating potential for providing a supplyvoltage to the control means; gate circuit means coupled to the supplyvoltage means and operative to shunt the supply voltage to a point ofreference potential, rendering the control means inoperative; meansresponsive to at least said synchronizing pulses for rendering the gatecircuit means inoperative, causing said supply voltage to be provided tothe control means for the duration of the synchronizing pulses; andmeans for applying said composite television input signals to thecontrol means which is responsive thereto to vary the charge on thecapacitor in accordance therewith.
 2. The combination according to claim11 wherein the control means includes comparator circuit means having anoutput coupled with the capacitor and having a signal inPut and areference input; with means for providing a reference potential to thereference input of the comparator circuit means, and said compositetelevision input signals are supplied to the signal input of thecomparator circuit means, with the supply voltage means supplyingoperating voltage to the comparator circuit means, the comparatorcircuit means being inoperative with the supply voltage shunted to saidpoint of reference potential and being rendered operative with the gatecircuit means rendered inoperative.
 3. A sample and hold circuit for usein a television receiver responsive to composite input signals andproviding synchronizing and flyback pulses, the circuit producing anoutput voltage indicative of the signal level of an input signal duringa sampling interval, the output voltage being changeable in accordancewith variations in the signal level during successive samplingintervals, including in combination: a storage capacitor connectedbetween a point of reference potential and an input junction; a sourceof operating potential; normally inoperative charge control meanscoupled between the source of operating potential and the storagecapacitor for controlling the charge thereon in accordance with thesignal level of input signals applied thereto; means for supplying saidcomposite television signals to the input of the charge control means;supply voltage means coupled with the source of operating potential forsupplying an operating voltage to the charge control means; gate circuitmeans coupled with the supply voltage means and normally operative toshunt the operating voltage to a point of reference potential, therebyrendering the charge control means inoperative; and means responsive toat least said synchronizing pulses to render the gate circuit meansinoperative, thereby causing the supply voltage means to supply saidoperating voltage to the charge control means rendering the controlmeans operative to control the charge on the capacitor in accordancewith the signal level of the input signals supplied to the controlmeans.
 4. The combination according to claim 3 wherein the gate circuitmeans includes first and second normally conductive shunt means to shuntthe operating voltage to said point of reference potential, the firstshunt means being rendered nonconductive by said synchronizing pulsesand the second shunt means being rendered nonconductive by said flybackpulses.
 5. A sample and hold circuit for use in a television receiverresponsive to composite television input signals and providingsynchronizing and flyback pulses, the circuit producing an outputvoltage indicative of the signal level of an input signal during asampling interval, the output voltage being changeable in accordancewith variations in the signal level during successive sampling intervalsincluding in combination: a storage capacitor connected between a pointof reference potential and an input junction; a source of operationpotential; first and second current source means connected in seriesbetween the source of operating potential and said point of referencepotential, with the first and second current sources being connectedtogether at the input junction of the capacitor, the first currentsource means operating to supply charge to the capacitor and the secondcurrent source means operative to remove charge from the capacitor;comparator circuit means having an output, a signal input and areference input, the comparator output being connected to the firstcurrent source means for controlling the operation thereof; means forsupplying a reference potential to the reference input of the comparatorcircuit means for establishing a threshold level; supply voltage meanscoupled with the source of operating potential for supplying anoperating voltage to the comparator circuit means and the second currentsource means; gate circuit means coupled with the supply voltage meansand operatiVe to shunt the supply voltage means to a point of referencepotential, rendering the comparator circuit means and the second currentsource means inoperative, the comparator circuit means being inoperativecausing the first current source means to be inoperative; and meansresponsive to at least said synchronizing pulses to render the gatecircuit means inoperative causing operating voltage to be provided tothe comparator circuit means and the second current source means for theduration of the synchronizing pulses; and means for applying saidcomposite television input signals to the signal input of the comparatorcircuit means for comparison with the reference potential appliedthereto.
 6. The combination according to claim 5 wherein the gatecircuit means includes first and second normally conductive shunt meansto shunt the supply voltage means to said point of reference potential,the first shunt means being rendered nonconductive by said synchronizingpulses and the second shunt means being rendered nonconductive by saidflyback pulses for rendering the voltage supply means operative uponcoincidence of the flyback pulses and the synchronizing pulses to removethe first and second shunts from the voltage supply means to therebyrender the comparator circuit means and the second current source meansoperative.
 7. The combination according to claim 6 wherein thecomparator circuit means provides an output to control the conductivityof the first current source means relative to the conductivity of thesecond current source means thereby varying the charge on the capacitorin accordance with the relative conductivities of the first and secondcurrent source means.